Atomic operations and memory barriers (MIPS isa 2 and MIPS64 specific).
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Detailed Description
Atomic operations and memory barriers (MIPS isa 2 and MIPS64 specific)
- Warning:
- atomic ops do not include memory barriers, see atomic_ops.h for more details.
-
not tested on MIPS64 (not even a compile test)
Config defines:
- NOSMP (in NOSMP mode it will also work on mips isa 1 CPUs that support LL and SC, see MIPS_HAS_LLSC in atomic_ops.h)
- __CPU_MIPS64 (mips64 arch., in 64 bit mode: long and void* are 64 bits)
- __CPU_MIPS2 or __CPU_MIPS && MIPS_HAS_LLSC && NOSMP (if __CPU_MIPS64 is not defined)
Definition in file atomic_mips2.h.
