Native (asm) atomic operations and memory barriers.
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Detailed Description
Native (assembler) atomic operations and memory barriers.
- Warning:
- atomic ops do not include memory barriers, see atomic_ops.h for more info. Expects atomic_t to be defined (include "atomic_common.h")
Config defines:
- CC_GCC_LIKE_ASM - the compiler support gcc style inline asm
- NOSMP - the code will be a little faster, but not SMP safe
- __CPU_i386, __CPU_x86_64, X86_OOSTORE - see atomic_x86.h
- __CPU_mips, __CPU_mips2, __CPU_mips64, MIPS_HAS_LLSC - see atomic_mip2.h
- __CPU_ppc, __CPU_ppc64 - see atomic_ppc.h
- __CPU_sparc - see atomic_sparc.h
- __CPU_sparc64, SPARC64_MODE - see atomic_sparc64.h
- __CPU_arm, __CPU_arm6 - see atomic_arm.h
- __CPU_alpha - see atomic_alpha.h
Definition in file atomic_native.h.