SIP-router atomic operations and memory barriers support. More...
Atomic operations and memory barriers (alpha specific).
Atomic ops and memory barriers for ARM (>= v3).
Common part for all the atomic operations.
Atomic operations and memory barriers (MIPS isa 2 and MIPS64 specific).
Native (asm) atomic operations and memory barriers.
Atomic operations and memory barriers (PowerPC and PowerPC64 versions).
Memory barriers for SPARC32 ( version < v 9)).
Atomic operations and memory barriers (SPARC64 version, 32 and 64 bit modes).
Atomic operations and memory barriers implemented using locks.
Atomic operations and memory barriers (x86 and x86_64/amd64 specific).
SIP-router atomic operations and memory barriers support for different CPU architectures implemented in assembler. It also provides some generic fallback code for architectures not currently supported.
1.7.1